Epson S1C6200 - Manual (Page 5)

S1C6200/6200A CORE CPU MANUAL EPSON i
CONTENTS
CONTENTS
1 D
ESCRIPTION
____________________________________________________ 1
1.1 System Features ........................................................................................................ 1
1.2 Instruction Set Features ........................................................................................... 1
1.3 Differences between S1C6200 and S1C6200A ......................................................... 1
2 M
EMORY AND
O
PERATIONS
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2.1 Program Memory (ROM) ......................................................................................... 3
2.1.1 Program counter block ............................................................................................ 4
2.1.2 Flags ........................................................................................................................ 4
2.1.3 Jump instructions ..................................................................................................... 5
2.1.4 PSET with jump instructions ................................................................................... 5
2.1.5 Call instructions ...................................................................................................... 5
2.1.6 PSET instruction ...................................................................................................... 6
2.1.7 CALZ instruction ..................................................................................................... 6
2.1.8 RET and RETS instructions ..................................................................................... 7
2.1.9 Stack considerations for call instructions ............................................................... 7
2.2 Data Memory ............................................................................................................ 8
2.2.1 Data memory addressing ......................................................................................... 8
2.3 ALU (Arithmetic Logic Unit) and Registers ............................................................ 10
2.3.1 D (decimal) flag and decimal operations ............................................................... 10
2.3.2 A and B registers .................................................................................................... 11
2.4 Timing Generator .................................................................................................... 11
2.4.1 HALT and SLP (sleep) modes ................................................................................. 11
2.5 Interrupts ................................................................................................................. 12
2.5.1 Interrupt vectors ..................................................................................................... 12
2.5.2 I (interrupt) flag ...................................................................................................... 12
2.5.3 Operation during interrupt generation .................................................................. 12
2.5.4 Initial reset .............................................................................................................. 15
3 I
NSTRUCTION
S
ET
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3.1 Instruction Indices ................................................................................................... 16
3.1.1 By function .............................................................................................................. 17
3.1.2 In alphabetical order .............................................................................................. 20
3.1.3 By operation code ................................................................................................... 23
3.2 Operands ................................................................................................................. 26
3.3 Flags ........................................................................................................................ 26
3.4 Instruction Types ..................................................................................................... 27
3.5 Instruction Descriptions .......................................................................................... 27
APPENDIX
A. S1C6200A (A
DVANCED
S1C6200) C
ORE
CPU _________________ 84
B. I
NSTRUCTION
I
NDEX
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S1C6200/6200A Core CPU Manual