Epson S1C6200 - Manual (Page 87)

Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
S1C6200/6200A CORE CPU MANUAL EPSON 81
3 INSTRUCTION SET
SZF
Set zero flag
SZF
Z
←
1
1 1 1 1 0 1 0 0 0 0 1 0 F42H
VI
7
Not affected
Set
Not affected
Not affected
Sets the Z (zero) flag.
SZF
Z flag 0 1
XOR r,i Exclusive-OR immediate data i with r-register
XOR r,i
r
←
r
∀
i
3
to i
0
1 1 0 1 0 0 r
1
r
0
i
3
i
2
i
1
i
0
D00H to D3FH
II
7
Not affected
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Performs an exclusive-OR operation between immediate data i and the contents
of the r-register. The result is stored in the r-register.
XOR A,12 XOR MX,1
A register 0110 1010 1010
Memory (MX) 0001 0001 0000
Z flag 0 0 1