Lanner LEC-7105 - Manual (Page 25)

25
Programming Watchdog Timer
Embedded and Industrial Computing
Appendix A
#define RUNTIME_BYPASS_PAIR2_ENABLE (0)
#define RUNTIME_BYPASS_PAIR2_DISABLE ( S I O _
GPIO_60_BIT)
/*Offmode bypass definitions */
#define OFFMODE_BYPASS_PAIR1_LDN
(9)
#define OFFMODE_BYPASS_PAIR1_REG (0xe5)
#define OFFMODE_BYPASS_PAIR1_BIT ( S I O _
GPIO_22_BIT | SIO_GPIO_23_BIT)
#define OFFMODE_BYPASS_PAIR1_ENABLE S
I O _
GPIO_22_BIT
#define OFFMODE_BYPASS_PAIR1_DISABLE S
I O _
GPIO_23_BIT
#define OFFMODE_BYPASS_PAIR2_LDN (7)
#define OFFMODE_BYPASS_PAIR2_REG (0xe1)
#define OFFMODE_BYPASS_PAIR2_BIT ( S I O _
GPIO_30_BIT | SIO_GPIO_31_BIT)
#define OFFMODE_BYPASS_PAIR2_ENABLE S
I O _
GPIO_30_BIT
#define OFFMODE_BYPASS_PAIR2_DISABLE S
I O _
GPIO_31_BIT
void start_watchdog_timer(int watchdog_time)
{
unsigned char tmp;
/* clear timeout value */
write_w83627_reg(0x08, 0xf6, 0x00);
/* set to count with second */
tmp=read_w83627_reg(0x08, 0xF5);
tmp &= ~(0x08);
write_w83627_reg(0x08, 0xF5, tmp);
/* clear status bit */
tmp=read_w83627_reg(0x08, 0xf7);
tmp &= ~(0x10);
write_w83627_reg(0x08, 0xf7, tmp);
/* set WDT Reset Event */
tmp=read_w83627_reg(0x08, 0xF7);
tmp = (0x00);
write_w83627_reg(0x08, 0xF7, tmp);
/* Set function enable */
write_w83627_reg(0x08, 0x30, 1);
/* fill in timeout value */
write_w83627_reg(0x08, 0xf6, watchdog_time);
return;
}
void stop_watchdog_timer(void)
{
/* stop timer */
write_w83627_reg(0x08, 0xf6, 0);
}
int wd_gpio_init(void)
{
unsigned char tmp;
int ret=0;
/* Set W83627 multiplex pin to WDTO function */
tmp=read_w83627_reg(0x00, 0x2b);
tmp &= ~(0x0c);
tmp |= 0x04;
write_w83627_reg(0x00, 0x2b, tmp);
/* clear timeout value */
write_w83627_reg(0x08, 0xf6, 0x00);
/* Enable LDN8 watchdog function */
tmp=read_w83627_reg(0x08, 0x30);
tmp |= 1;