Rcv56hcf pci/cardbus modem designer’s guide – Hayes Microcomputer Products RCV56HCF User Manual

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RCV56HCF PCI/CardBus Modem Designer’s Guide

ROCKWELL PROPRIETARY INFORMATION

1129

1-8

Speakerphone Mode (ISDN and SP Models)

The speakerphone mode features an advanced proprietary speakerphone algorithm which supports full-duplex voice
conversation with both acoustic and line echo cancellation. Parameters are constantly adjusted to maintain stability with
automatic fallback from full-duplex to pseudo-duplex operation. The speakerphone algorithm allows position independent
placement of microphone and speaker.

The speakerphone mode provides hands-free full-duplex telephone operation under host control. The host can separately
control volume, muting, and AGC in microphone and speaker channels.

Synchronous Access Mode (SAM)

V.80 and Rockwell Video Ready synchronous access modes between the modem and the host/DTE are provided for host-
controlled communication protocols, e.g., H.324 video conferencing applications.

Voice-call-first (VCF) before switching to a videophone call is also supported.

1.3.3 Host-Controlled

Modem

Software

Host-controlled modem software performs processing of general modem control, command sets, fax Class 1, AudioSpan,
DSVD, speakerphone, voice/audio/TAM, error correction, data compression, and operating system interface functions.
Configurations of the modem software are provided to support modem models listed in Table 1-1.

Binary executable modem software is provided for the OEM.

1.3.4 Downloadable Modem Data Pump Firmware

Binary executable code controlling MDP operation is downloaded as required during operation.

1.3.5 Hardware

Interfaces

1.3.5.1 PCI

Bus

Host

Interface

The Bus Interface conforms to the PCI Local Bus Specification, Production Version, Revision 2.1, June 1, 1995. It is a
memory slave (burst transactions) and a bus master for PC host memory accesses (burst transactions). Configuration is by
PCI configuration protocol.

The following interface signals are supported:

Address and data

32 bidirectional Address/Data (AD[31-0]; bidirectional

Four Bus Command and Byte Enable (CBE [3:0]), bidirectional

Bidirectional Parity (PAR); bidirectional

Interface control

Cycle Frame (FRAME#); bidirectional

Initiator Ready (IRDY#); bidirectional

Target Ready (TRDY#); bidirectional

Stop (STOP#); bidirectional

Initialization Device Select (IDSEL); input

Device Select (DEVSEL#); bidirectional

Arbitration

Request (REQ#); output

Grant (GRANT#); input

Error reporting

Parity Error ((PERR#); bidirectional

System Error ; bidirectional

Interrupt

Interrupt A (INTA#); output

System

Clock (PCICLK); input

Reset (PCIRST#); input

Clock Running (CLKRUN#); input

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