Motorola MC9S12GC-Family - Manual (Page 122)

Device User Guide — 9S12C128DGV1/D V01.05
122
Figure C-4 SPI Slave Timing (CPHA=1)
In Table C-3 the timing characteristics for slave mode are listed.
Table C-3 SPI Slave Mode Timing Characteristics
Num C Characteristic Symbol Unit
Min Typ Max
1 D SCK Frequency f
sck
DC — 1
/
4 f
bus
1 P SCK Period t
sck
4 — t
bus
2 D Enable Lead Time t
lead
4 — — t
bus
3 D Enable Lag Time t
lag
4 — — t
bus
4 D Clock (SCK) High or Low Time t
wsck
4 — — t
bus
5 D Data Setup Time (Inputs) t
su
8 — — ns
6 D Data Hold Time (Inputs) t
hi
8 — — ns
7 D
Slave Access Time (time to data
active)
t
a
— — 20 ns
8 D Slave MISO Disable Time t
dis
— — 22 ns
9 D Data Valid after SCK Edge t
vsck
— — 30 + t
bus
1
NOTES :
1. t
bus
added due to internal synchronization delay
ns
10 D Data Valid after SS fall t
vss
— — 30 + t
bus
1 ns
11 D Data Hold Time (Outputs) t
ho
20 — — ns
12 D Rise and Fall Time Inputs t
rfi
— — 8 ns
13 D Rise and Fall Time Outputs t
rfo
— — 8 ns
SCK
(INPUT)
SCK
(INPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
1
5 6
MSB IN
BIT 6 . . . 1
LSB IN
MSB OUT SLAVE LSB OUT
BIT 6 . . . 1
4 4
9
12 13
11
(CPOL
=
0)
(CPOL
=
1)
SS
(INPUT)
2 12 13
3
NOTE: Not defined!
SLAVE
7
8
see
note
∞