Motorola MC9S12GC-Family - Manual (Page 52)

Device User Guide — 9S12C128DGV1/D V01.05
52
Section 2 Signal Description
2.1 Device Pinout
Figure 2-1 Pin Assignments in 80 QFP for MC9S12C-Family
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
MC9S12C-Family
MC9S12GC-Family
VRH
VDDA
PAD07/AN07
PAD06/AN06
PAD05/AN05
PAD04/AN04
PAD03/AN03
PAD02/AN02
PAD01/AN01
PAD00/AN00
VSS2
VDD2
PA7/ADDR15/DATA15
PA6/ADDR14/DATA14
PA5/ADDR13/DATA13
PA4/ADDR12/DATA12
PA3/ADDR11/DATA11
PA2/ADDR10/DATA10
PA1/ADDR9/DATA9
PA0/ADDR8/DATA8
PP4/KWP4/PW4 PP5/KWP5/PW5 PP7/KWP7 VDDX VSSX PM0/RXCAN PM1/TXCAN PM2/MISO PM3/
SS
PM4/MOSI PM5/SCK PJ6/KWJ6 PJ7/KWJ7 PP6/KWP6/R
OMCTL
PS3 PS2 PS1/TXD PS0/RXD VSSA VRL
PW3/KWP3/PP3
PW2/KWP2/PP2
PW1/KWP1/PP1
PW0/KWP0/PP0
PW0/IOC0/PT0
PW1/IOC1/PT1
PW2/IOC2/PT2
PW3/IOC3/PT3
VDD1
VSS1
PW4/IOC4/PT4
IOC5/PT5
IOC6/PT6
IOC7/PT7
MODC/TAGHI/BKGD
ADDR0/DATA0/PB0
ADDR1/DATA1/PB1
ADDR2/DATA2/PB2
ADDR3/DATA3/PB3
ADDR4/DATA4/PB4
ADDR5/D
A
TA5/PB5
ADDR6/D
A
TA6/PB6
ADDR7/D
A
TA7/PB7
XCLKS/NO
A
CC/PE7
MODB/IPIPE1/PE6 MOD
A/IPIPE0/PE5
ECLK/PE4
VSSR VDDR
RESET
VDDPLL
XFC
VSSPLL
EXT
AL
XT
AL
TEST/VPP
LSTRB/
TA
GLO/PE3 R/
W/PE2
IRQ/PE1
XIRQ/PE0
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
Signals shown in Bold are not available on the 52 or 48 Pin Package
Signals shown in
Bold Italic are available in the 52, but not the 48 Pin Package