Motorola MC9S12GC-Family - Manual (Page 132)

Device User Guide — 9S12C128DGV1/D V01.05
132
E.1.1 PK[2:0] / XADDR[16:14]
PK2-PK0 provide the expanded address XADDR[16:14] for the external bus.
Refer to the S12 Core user guide for detailed information about external address page access.
The reset state of DDRK in the S12_CORE is $00, configuring the pins as inputs.
The reset state of PUPKE in the PUCR register of the S12_CORE is "1" enabling the internal pullup
resistors at PortK[2:0].
In this reset state the pull-up resistors provide a defined state and prevent a floating input, thereby
preventing unneccesary current consumption at the input stage.
Pin Name
Function 1
Pin Name
Function 2
Power
Domain
Internal Pull
Resistor
Description
CTRL
Reset
State
PK[2:0] XADDR[16:14] VDDX PUPKE Up Port K I/O Pins