4 dram interface support, 5 i/o support, 1 pxb features – Intel 460GX User Manual

Page 16: Dram interface support -4, I/o support -4 1.5.1, Pxb features -4

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Introduction

1-4

Intel® 460GX Chipset Software Developer’s Manual

1.4

DRAM Interface Support

•

SDRAM 3.3 volt, 168-pin DIMM’s are the only memory type supported.

•

Support for 64 MB to 64 GB of DRAM.

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Minimum memory size is 64 MB using 16 MB DIMM’s.

•

Minimum incremental size is 64 MB using 16 MB DIMM’s.

•

Maximum memory size is 16 GB using 128 MB DIMM’s.

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Maximum memory size is 64 GB using 1 GB DIMM’s.

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Only 3.3 volt memory is supported.

•

Support for Auto Detection of SDRAM Memory Type.

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Supports 16, 64, 128 and 256 Mbit DRAM devices.

•

Mixed memory sizes allowed between rows.

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Staggered CAS-before-RAS refresh (standard SDRAM refresh).

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ECC with single-bit error correction, double and nibble error detection.

•

Extensive processor-to-Memory and PCI-to-Memory write data buffering, thus minimizing
the interference of writes on read latency.

1.5

I/O Support

•

4 Expander ports, each 30 bits wide and providing 533 MB/s peak bandwidth.

•

Each Expander bus supports a single PXB or WXB. Two Expander busses can be configured
to support a GXB.

•

Full support for the PCI Configuration Space Enable (CSE) protocol to devices on all
Expander ports.

•

Data streaming support between Expanders and DRAM, up to 533 MB/s per Expander port.

•

All outbound memory and I/O reads (except locked reads) are deferred.

•

All outbound memory space writes are posted. Outbound I/O space writes are optionally
posted (unless targeting an address with side effects, in which case they are deferred).

•

All inbound memory reads are delayed.

•

All inbound memory space writes are posted.

•

Supports concurrent processor and I/O initiated transactions to main memory.

•

Maintains coherency with processors by snooping all inbound transactions to the system bus.

•

Supports non-coherent traffic (for AGP), with a direct path to memory bypassing the system
bus.

1.5.1

PXB Features

•

Can be configured to provide two independent 32 bit, 33 MHz PCI buses or one 64 bit, 33
MHz PCI bus.

•

PCI Rev. 2.2, 5V tolerant (PXB drives 3.3 volts, but is 5.0 volt tolerant).

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