Table a6. 83c196ld default signal conditions – Intel 8XC196Lx User Manual

Page 117

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A-9

SIGNAL DESCRIPTIONS

Table A-6. 83C196LD Default Signal Conditions

Port

Signals

Alternate

Functions

During RESET#

Active

Upon RESET#

Inactive
(Note 6)

Idle

Power-

down

P0.7:2

HiZ

HiZ

HiZ

HiZ

P1.0

EPA0/T2CLK

WK1

WK1

(Note 1)

(Note 1)

P1.1

EPA1

WK1

WK1

(Note 1)

(Note 1)

P1.2

EPA2/T2DIR

WK1

WK1

(Note 1)

(Note 1)

P1.3

EPA3

WK1

WK1

(Note 1)

(Note 1)

P2.0

TXD

WK1

WK1

(Note 1)

(Note 1)

P2.1

RXD

WK1

WK1

(Note 1)

(Note 1)

P2.2

EXTINT

WK1

WK1

(Note 1)

(Note 1)

P2.4

WK1

WK1

(Note 1)

(Note 1)

P2.6

ONCE

MD1

MD1

(Note 1)

(Note 1)

P2.7

CLKOUT

CLKOUT active,

LoZ0/1

CLKOUT active,

LoZ0/1

(Note 1)

(Note 2)

P3.7:0

AD7:0

WK1

HiZ

(Note 4)

(Note 4)

P4.7:0

AD15:8

WK1

HiZ

(Note 4)

(Note 4)

P5.0

ALE/ADV#

WK1

WK1

(Note 1)

(Note 1)

P5.2

WR#/WRL#

WK1

WK1

(Note 1)

(Note 1)

P5.3

RD#

WK1

WK1

(Note 1)

(Note 1)

P6.0

EPA8

WK1

WK1

(Note 1)

(Note 1)

P6.1

EPA9

WK1

WK1

(Note 1)

(Note 1)

P6.4

SC0

WK1

WK1

(Note 1)

(Note 1)

P6.5

SD0

WK1

WK1

(Note 1)

(Note 1)

P6.6

SC1

WK1

WK1

(Note 1)

(Note 1)

P6.7

SD1

WK1

WK1

(Note 1)

(Note 1)

EA#

WK1 (Note 5)

WK1

WK1

WK1

RESET#

LoZ0

MD1

MD1

MD1

V

PP

HiZ

HiZ

LoZ1

LoZ1

XTAL1

Osc input, HiZ

Osc input, HiZ

Osc input,

HiZ

Osc input,

HiZ

XTAL2

Osc output,

LoZ0/1

Osc output,

LoZ0/1

Osc output,

LoZ0/1

(Note 3)

NOTES:
1.

If P

x_MODE.y = 0, port is as programmed.

If P

x_MODE.y = 1, pin is as specified by Px_DIR and the associated peripheral.

2.

If P2_MODE.7 = 0, pin is as programmed. If P2_MODE.7 = 1, pin is LoZ0.

3.

If XTAL1 = 0, pin is LoZ1. If XTAL1 = 1, pin is LoZ0.

4.

If EA# = 0, port is HiZ. If EA# = 1, port is open-drain I/O.

5.

Although EA# is weakly pulled high, do not allow it to float. Always tie EA# to V

CC

if it is not connected

to an external device.

6.

The values in this column are valid until your software writes to P

x_MODE.

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