Intel 8XC251SA - Manual (Page 22)

22
PRELIMINARY
8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER
5.3.1 EXTERNAL BUS CYCLES, NONPAGE MODE
Figure 7. External Bus Cycle: Code Fetch (Nonpage Mode)
XTAL1
ALE
TLHLL
†
A7:0
TRHDZ1
RD#/PSEN#
P0
P2/A16/A17
TRHDX
TRHLH1
TRLRH
†
TLLRL
†
TAVLL
†
TRLDV
†
TAVRL
†
TAVDV1
†
TAVDV2
†
TOSC
A4211-03
TLHAX
†
Instruction In
† The value of this parameter depends on wait states. See the table of AC characteristics.
A15:8/A16/A17
D7:0
TRLAZ
TLLAX