Intel 8XC251SA - Manual (Page 23)

PRELIMINARY
23
8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Figure 8. External Bus Cycle: Data Read (Nonpage Mode)
XTAL1
ALE
TLHLL
†
A7:0 D7:0
RD#/PSEN#
P0
P2/A16/A17
TRHDX
TRHLH2
TRLRH
†
TLLRL
†
TAVLL
†
TLLAX
TRLDV
†
TAVRL
†
TAVDV1
†
TAVDV2
†
TOSC
A4210-03
TLHAX
†
Data In
†
The value of this parameter depends on wait states. See the table of AC characteristics.
A15:8/A16/A17
TRHDZ2
TRLAZ