Intel 8XC251SA - Manual (Page 24)

24
PRELIMINARY
8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Figure 9. External Bus Cycle: Data Write (Nonpage Mode)
WR#
P0
P2/A16/A17
TLHLL
†
TWLWH
†
TWHLH
A4179-01
XTAL1
ALE
TOSC
TWHQX
TQVWH
TWHQX
TAVWL1
†
TAVWL2
†
TWHAX
A7:0 D7:0
Data Out
A15:8/A16/A17
†
The value of this parameter depends on wait states. See the table of AC characteristics.
TLLAX
TLHAX
†
TAVLL
†