JVC Model 200 - Manual (Page 68)

Chapter 2---System Description
I 8 TP_KEY Data for adjustment of top/bottom keystone
I 8 TP_KEY_BAL Data for adjustment of top/bottom keystone
balance
I 1 /RASTER_FIL Control line for the raster fill option, low = raster
fill is active
I 1 /CONV_ENABLE Convergence enable line low = enabled
convergence
O 1 ILA_LOCKED Status line for the lock indication of the PLL of the
ILA section with high = locked PLL
O 1 /CD_OK Convergence board status line. Low =
operational C/D Board, High = Nonoperational
C/D Board.
O 2 CD_MODEL Revision of C/D Board
The Convergence/Deflection Board I/O
This section describes the inputs to and outputs from the C/D
Board. The I/O descriptions are arranged by the source and
destination of the signal. The assembly communicated with is the
primary heading of each group of signals. Those signals are
subdivided into inputs and outputs. Input refers to an Input to the
C/D Board, output refers to an output from the C/D Board.
Table 2-13. Convergence Deflection I/O signals
System Controller Board
INPUTS DESCRIPTION
IIC_CLK
IIC clock line. Unidirectional clock line for control of synchronous
data transfer over the IIC bus interface.
IIC_DATA IIC data line. Bidirectional serial line for synchronous data transfer
between the System Controller Board and the C/D Board.
X_RED_
CONV Red X convergence waveform. The amplitude for full scale
correction is about 1 VPP.
X_GRN_
CONV Green X convergence waveform. The amplitude for full scale
correction is about 1 VPP.
X_BLU_
CONV Blue X convergence waveform. The amplitude for full scale
correction is about 1 VPP.
Y_RED_
CONV Red Y convergence waveform. The amplitude for full scale correction
is about 1 VPP.
Y_GRN_
CONV Green Y convergence waveform. The amplitude for full scale
correction is about 1 VPP.
Y_BLU_
CONV Blue Y convergence waveform. The amplitude for full scale
correction is about 1 VPP.
CORR_
SYNC
Square wave HCT level synchronization signal for horizontal axis
OUTPUTS DESCRIPTION
/IIC_SINT
IIC interrupt line. Convergence board does not initiate any IIC
interrupt.
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