Clk in (sample clock and reference clock input), Clk in – National Instruments NI 5422 User Manual

Page 19

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© National Instruments Corporation

19

NI 5422 Specifications

CLK IN

(Sample Clock and Reference Clock Input, Front Panel Connector)

Table 5.

Specification

Value

Comments

Connector

SMB (jack)

—

Direction

Input

—

Destinations

1. Sample Clock

2. PLL Reference Clock

—

Frequency
Range

5 MHz to 200 MHz (Sample Clock Destination)

5 MHz to 20 MHz (PLL Reference Clock destination)

—

Input Voltage
Range

Sine wave: 0.65 V

pk-pk

to 2.8 V

pk-pk

into 50

Ω

(0 dBm to +13 dBm)

Square wave: 0.2 V

pk-pk

to 2.8 V

pk-pk

into 50

Ω

—

Maximum
Input Overload

±10 V

—

Input
Impedance

50

Ω

—

Input Coupling

AC

—

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