NEC PD75402A - Manual (Page 56)

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CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
Fig. 5-4 Configuration of Ports 2 and 6
* Input/output mode specification is performed by bit 2 (PM2) of PMGB for port 2 and by bits 4 to 7 (PM60 to 63)
of PMGA for port 6.
Remarks m = 2 or 6
Internal Bus
Output Latch
PM2/
PM60 to
63
Input Buffer
POGA
Bit m
POm
PMm = 0
PMm = 1
P-ch
Pull-up
Resistors
V
DD
P m 0
P m 1
P m 2
P m 3
Output
Buffer
PMGB Bit 2,
PMGA bits
4 to 7
M
P
X
*