NEC PD75402A User Manual
Page 96
85
CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
(a) Serial operating mode register (CSIM)
When the 3-wire serial I/O mode is used, CSIM is set as shown below (see 5.5.3 (1) “Serial operating mode
register” for full details of CSIM).
CSIM is manipulated by 8-bit memory manipulation instructions. Bit manipulation of bits 7, 6 and 5 is also
possible.
Reset input clears the CSIM register to 00H.
The shaded area indicates bits used in the 3-wire serial I/O mode.
Address
7
6
5
4
3
2
1
0
Symbol
FE0H
CSIE
C0I
WUP
0
CSIM3
0
CSIM1
0
CSIM
Serial Clock Selection Bit (W)
Serial Interface Operating Mode Selection Bit (W)
Wake-up Function Specification Bit (w)
Match Signal from Address Comparator (R)
Serial Interface Operation Enable/Disable Specification Bit (W)
Remarks
(R)
Read only
(W)
Write only
Serial clock selection bit (W)
Serial Clock
CSIM1
SCK Pin Mode
3-Wire Serial I/O Mode
SBI Mode
0
Input clock to SCK pin from off chip
Input
1
f
XX
/2
4
(262 kHz)
Output
Remarks
Figuer in ( ) apply to f
XX
= 4.19 MHz operation
Serial interface operating mode selection bit (W)
0
SI/P03 (Input)
SO/P02
(CMOS Output)
3-wire serial I/O
mode
SIO
7 to 0
↔
XA
(MSB-fist transfer)
Operating Mode
Shift Register Bit Order
SO Pin Function
Si Pin Function
Wake-up function specification bit (W)
WUP
0
IRQCSI set at end of every serial transfer.
CSIM3