National Instruments NI 6120 - Manual (Page 65)

Chapter 4 Connecting Signals
© National Instruments Corporation 4-27 NI 6115/6120 User Manual
The ADC switches to hold mode within 20 ns of the selected edge. This
hold-mode delay time is a function of temperature and does not vary from
one conversion to the next.
The sample interval counter on the NI 6115/6120 device normally
generates CONVERT* unless you select some external source. The counter
is started by the STARTSCAN signal and continues to count down and
reload itself until the scan is finished. It then reloads itself in preparation for
the next STARTSCAN pulse.
A/D conversions generated by either an internal or external CONVERT*
signal are inhibited unless they occur within a DAQ sequence. Scans
occurring within a DAQ sequence may be gated by either the hardware
signal AIGATE or the software command register gate.
AIGATE Signal
Any PFI pin can receive as an input the AIGATE signal, which is not
available as an output on the I/O connector. The AIGATE signal can mask
off scans in a DAQ sequence. You can configure the PFI pin you select as
the source for AIGATE in level-detection mode. You can configure the
polarity selection for the PFI pin for either active high or active low.
In the level-detection mode if AIGATE is active, the STARTSCAN signal
is masked off and no scans can occur.
AIGATE can neither stop a scan in progress nor continue a previously
gated-off scan. Once a scan has started, AIGATE does not gate off
conversions until the beginning of the next scan and, conversely, if
conversions are being gated off, AIGATE does not gate them back on until
the beginning of the next scan.
SISOURCE Signal
Any PFI pin can receive as an input the SISOURCE signal, which is not
available as an output on the I/O connector. The onboard scan interval
counter (SI) uses SISOURCE as a clock to time the generation of the
STARTSCAN signal. You must configure the PFI pin you select as the
source for SISOURCE in the level-detection mode. You can configure the
polarity selection for the PFI pin for either active high or active low.
The maximum allowed frequency is 20 MHz, with a minimum pulse width
of 23 ns high or low. There is no minimum frequency limitation.