NEC PD17062 User Manual
Page 30
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30
µ
PD17062
Fig. 5-1 Data Memory Structure
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
DBF3 DBF2 DBF1 DBF0
P0A
(4 bits)
System register
P0B
(4 bits)
P0C
(4 bits)
P0D
(4 bits)
BANK0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
P1A
(4 bits)
System register
P1B
(4 bits)
P1C
(4 bits)
Fixed
at 0
BANK1
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
P0A
(4 bits)
System register
P0B
(4 bits)
P0C
(4 bits)
P0D
(4 bits)
BANK2
The same register is allocated for each bank.
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