M 1523 block diagram, Theory of operation – Texas Instruments 60X User Manual

Page 57

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Theory of Operation

4-11

Figure 4-4 M1523 Chip Simplified Block Diagram

M 1523 Block Diagram

DATA

Buffer

Control

Address

Buffer

Decoder

Clock & Reset

PCI BUS

Interface

UNIT

PCI

Arbiter

Interface

ISA

Interrupt

UNIT

PCI

Interrupt

UNIT

CPU

Interface

USB

Interface

(reserved)

PCI
IDE

Master

Interface

ISA BUS

Interface

UNIT

DMA

Refresh

UNIT

PMU or APIC

Interface

PS2/AT

Keyboard

Controller

Timer

UNIT

MISC.

Logic

REAL

Time

Clock

PWG
CPURST
RSTDRV
OSC14M

PCICLK
CBEJ[3:0]
AD[31:0]
FRAMEJ
TRDYJ
IRDYJ
STOPJ
DEVSELJ
SERRJ
PAR

PHOLDJ
PHLDAJ

FERRJ
IRQ[15:14]
IRQ[11:3]

INTAJ/M1II
NTBJ/S0
INTCJ/S1
INTDJ/S2

IGNNEJ
INTR
NMI
A20MJ
USBCLK
USBP[11:10]

IDRQ[0:1]
IDAKJ[0:1]
IDERDY
IDEIORJ
IDEIOWJ
IDESCS3J
IDESCS1J
IDEPCS3J
IDEPCS1J
IDE_A[2:0]
IDE_D[15:0]

SD[15:8]
XD[7:0]
SA[19:0]
SBHEJ
LA[23:17]
IO16J
M16J
MEMRJ
MEMWJ
AEN
IOCHRDYJ
NOWSJ
IOCHKJ
SYSCLK
BALE
IORJ
IOWJ
SMEMRJ/LMEGJ
SMEMWJ/RTCAS
EXTSW
STPCLKJ

SPKR

SIRQI
XDIR
SPLED
ROMCSJ

SIRQII
RTC32KI
RTC32KII

KBINH/IRQ1
KBCLK/KBCSJ
KBDATA
MSCLK
IRQ12/MDATA

DREQ[7:5]
DREQ[3:0]
DACKJ[7:5]
DACK2J/3J
TC
REFSHJ

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