Rainbow Electronics W90N745CDG User Manual
Page 284
W90N745CD/W90N745CDG
Publication Release Date: September 22, 2006
-
279
-
Revision
A2
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
FMES RFTLS
DMS
IID
NIP
BITS
DESCRIPTIONS
[31:8]
Reserved -
[7]
FMES
FIFO Mode Enable Status
This bit indicates whether the FIFO mode is enabled or not. Since the
FIFO mode is always enable, this bit always shows the logical 1 when
CPU is reading this register.
[6:5]
RFTLS
RX FIFO Threshold Level Status
These bits show the current setting of receiver FIFO threshold level
(RTHO). The meaning of RTHO is defined in the following FCR
description.
[4]
DMS
DMA Mode Select
The DMA function is not implemented in this version. When reading IIR,
the DMS is always returned 0.
[3:1]
IID
Interrupt Identification
The IID together with NIP indicates the current interrupt request from
UART.
[0]
NIP
No Interrupt Pending
There is no pending interrupt.