Rainbow Electronics MAX11043 User Manual
Page 23
MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
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23
FINE GAIN REGISTER
GAIN
7FFFh
(4 – 1/8192)
4000h
2
2001h
8193/8192
2000h
1 (default)
1FFFh
8191/8192
1000h
0.5
0800h
0.25
Fine Gain A/B/C/D Registers (11h–14h)
Fine gain for each channel is a two’s complement binary value (8192 x desired gain).
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CHAN1
CHAN0
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
Filter Coefficient Address Register (15h)
CHAN_<7:6>: Channel selection.
00 = channel A (default).
01 = channel B.
10 = channel C.
11 = channel D.
ADR5:ADR0<5:0>: Address pointer for C-RAM con-
taining filter coefficients (default = 0).
Filter Coefficient Data Out Register (16h)
This is a 32-bit register that contains the data from a
C-RAM read operation.
Filter Coefficient Data In Register (17h)
This is a 32-bit register that contains the data for a C-RAM
write operation. Default = 0.