Rainbow Electronics DS2172 - Manual (Page 2)

DS2172
031197 2/20
1.0 GENERAL OPERATION
1.1 Pattern Generation
The DS2172 is programmed to generate a particular
test pattern by programming the following registers:
– Pattern Set Registers (PSR)
– Pattern Length Register (PLR)
– Polynomial Tap Register (PTR)
– Pattern Control Register (PCR)
– Error Insertion Register (EIR)
Please see Tables 4 and 5 for examples of how to pro-
gram these registers in order to generate some stan-
dard test patterns. Once these registers are pro-
grammed, the user will then toggle the TL (Transmit
Load) bit or pin to load the pattern into the onboard pat-
tern generation circuitry and the pattern will begin
appearing at the TDATA pin.
1.2 Pattern Synchronization
The DS2172 expects to receive the same pattern that it
transmitted. The synchronizer examines the data at
RDATA and looks for characteristics of the transmitted
pattern. The user can control the onboard synchronizer
with the Sync Enable and Resync bits in the Pattern
Control Register.
In pseudorandom mode, the received pattern is tested
to see if it fits the polynomial generator as defined in the
transmit side. For pseudorandom patterns, only the
original pattern and an all ones pattern or an all zeros
pattern will satisfy this test. Synchronization in pseudo-
random pattern mode should be qualified by using the
RA1 and RA0 indicators in the Status Register. Once in
synchronization (SR0. = 1) any deviation from this pat-
tern will be counted by the Bit Error Count Register.
In repetitive pattern mode a received pattern of the
same length as being transmitted will satisfy this test.
Synchronization in repetitive pattern mode should be
qualified by using the RA1 and RA0 indicators in the
Status Register and examining the Pattern Receive
Register (PRR0––3). See section 10 for an explanation
of the Pattern Receive Register. Once in synchroniza-
tion (SR.0 = 1) any deviation from this pattern will be
counted by the Bit Error Count Register.
1.3 BER Calculation
Users can calculate the actual Bit Error Rate (BER) of
the digital communications channel by reading the bit
error count out of the Bit Error Count Register (BECR)
and reading the bit count out of the Bit Count Register
(BCR) and then dividing the BECR value with the BCR
value. The user has total control over the integration
period of the measurement. The LC (Load Count) bit or
pin is used to set the integration period.
1.4 Generating Errors
Via the Error Insertion Register (EIR), the user can
intentionally inject a particular error rate into the trans-
mitted data stream. Injecting errors allows users to
stress communication links and to check the functional-
ity of error monitoring equipment along the path.
1.5 Power–Up Sequence
On power–up, the registers in the DS2172 will be in a
random state. The user must program all the internal
registers to a known state before proper operation can
be insured.