Diodes PAM8803 - Manual (Page 10)

PAM8803
Document number: DSxxxxx Rev. 1 - 4
10 of 14
www.diodes.com
November 2012
© Diodes Incorporated
PAM8803
A Product Line of
Diodes Incorporated
Application Information
(cont.)
How to Reduce EMI (Electro Magnetic Interference
Most applications require a ferrite bead filter which shows at Figure 3. The ferrite filter reduces EMI around 1 MHz and higher. When selecting a
ferrite bead, choose one with high impedance at high frequencies, but low impedance at low frequencies.
Figure 3. Ferrite Bead Filter to Reduce EMI
PCB Layout Guidelines
Grounding
At this stage it is paramount t h a t we acknowledge the need for separate grounds. Noise currents in the output power stage need to be returned
to output noise ground and nowhere else. Were these currents to circulate elsewhere, they may get into the power supply, the signal ground, etc,
worse yet, they may form a loop and radiate noise. Any of these instances results in degraded amplifier performance. The logical returns for the
output noise currents associated with Class D switching are the respective PGND pins for each channel. The switch state diagram illustrates that
PGND is instrumental in nearly every switch state. This is the perfect point to which the output noise ground trace should return. Also note that
output noise ground is channel specific. A two channels amplifier has two mutually exclusive channels and consequently must have two mutually
exclusive output noise ground traces. The layout of the PAM8803 offers separate PGND connections for each channel and in some cases each
side of the bridge. Output noise grounds must tie to system ground at the power in exclusively. Signal currents for the inputs, reference, etc need
to be returned to quite ground. This ground only ties to the signal components and the GND pin. GND then ties to system ground.
Power Supply Line
As same to the ground, V
DD
and each channel PV
DD
need to be separated and tied together at the system power supply. Recommend that all
the trace could be routed as short and thick as possible. For the power line layout, just imagine water stream, any barricade placed in the trace
(shows in Figure 4) could result in the bad performance of the amplifier.
Figure 4
Componemts Placement
The power supply decoupling capacitors need to be placed as close to V
DD
and PV
DD
pins as possible. The inputs need to be routed away from
the noisy trace. The V
REF
bypass capacitor also needs to be close to the pin of IC very much.
PCB Top Layer PCB Bottom Layer
Figure 5. Layout Example