Clear-Com AES-6 User Manual
Page 10
Vitec Group Communications
AES-6 Digital Interface Instruction Manual
1 - 4
Table 1-1: CPU Status Codes
Note: The flash ratios in the table are the mark/space ratio for the
LED flashing.
If the FPGA image fails during card bootup the FPGA image will be
erased and the AES-6 will prompt for a new FPGA image to be
downloaded by switching the CPU status LED and all six ports LEDs to
quick blink mode.
During a FPGA download the six port LEDs will flash in a rotating
display with one LED lit at a time until the download stops. The
sequence (by port number) is 2-4-6-5-3-1. When the flash
programming is complete the AES6 card will reboot.
Hardware errors are indicated by the CPU LED flashing rapidly
together with various port LEDs which constitute the fault code. The
current fault codes are given in the table below.
CPU STATUS LED STATE
MEANING
Off
Card software failed to boot
Slow flash (approx 1Hz) 50:50
Software is running OK
Quick blink flash (approx 1Hz )
25:75
FPGA image download in progress
Fast flash (approx 5Hz) 50:50
Software has detected a hardware
failure.