Lectrosonics SPNTWB - Manual (Page 10)

SPNTWB
LECTROSONICS, INC. 10
380 Ohms
Pro gr amma b le Output Pi n
380 Ohms
Programmable Output Pin
1N4001
or equi v . Exte r na l
DC V oltag e
Source
(<40VDC) Rel a y Coi l
Coil current <100mA
Pro gr amma b le Output Pi n
Relay is on when the programmable output is active
+5VDC
+5VDC
GND
LED is ON when the programmable output is active
GND
LED is OFF when the programmable output is active
Note: The diagram above shows an external DC source pow-
ering the relay coil. This is necessary whenever coil voltages
exceed 5 volts.
LED
380 TO
500 OHM
10K
LINEAR
POT
CW CCW
IN 1
IN 3 ON
OFF
LOGIC OUTPUTS
GROUND
5VDC
LOGIC INPUTS
LOGIC
OUT 7
LOGIC IN 3
ANODE CATHODE
V
R
Anode
Cathode
Cathode Anode
ASPEN RS-232 Port Wiring Diagram
1
2
3
4
5
6
7
8
9 1
2
3
4
5
6
7
8
9 DCD
RX
TX
DTR
GND
DSR
RTS
CTS
RI
TX
RX
GND
Host
Serial
Port
(PC)
ASPEN
RS-232
Port
Wiring Diagram
ASPEN Device to PC
DTE pin
functions
Female
connector
Male
connector
DCE pin
functions
Female
jack
Male jack
Crestron ® and AMX ® Port Wiring Diagram
1
2
3
4
5
6
7
8
9 1
2
3
4
5
6
7
8
9
RX
TX
GND
TX
RX
GND
Crestron
RS-232
Port
ASPEN
RS-232
Port
Wiring Diagram
Female
connector
Male
connector
Female jack Male jack
Cabling Of Stacked Units
In a stacked configuration, ASPEN processors must
be interconnected as shown here. Each Slave unit in
a stack gathers data and audio signals from the unit
below it, adds its own signals and passes the total on to
the unit above it. At the top of the stack, the Master unit
gathers all signals from below, adds its own and then
sends the total back down the bus to all Slave units
below it. In this manner, all Slave units have access to
all inputs on any unit in the stack.
Each circuit board has an upper and a lower CAT-5 con-
nector. Since there are two circuit boards in a 2RU unit,
the circuit boards are connected in the same manner as
if they were in separate chassis. The ASPEN bus is bi-
directional, handling data and audio signal forward and
back propagation through a single cable connection.
1RU SPN
Processor
configured as
Master
2RU SPN
Processor
configured as
intermediate
Slave
1RU SPN
Processor
configured
as lowermost
Slave
ASPEN PORT
The processors automatically configure themselves for
Master and Slave status as determined by the cabling.
If a unit is connected to another unit above it through
the upper connector, it is automatically configured as
a Slave. If there is no unit above it, then it becomes a
Master.