D.1 a, Ddress, D.2 1 – IEI Integration PCIE-Q350 v1.00 User Manual
Page 242: Mb m, Emory, D.1 address map

PCIE-Q350 PICMG 1.3 CPU Card
Page 220
D.1 Address Map
I/O address Range
Description
000-01F DMA
Controller
020-021 Interrupt
Controller
040-043 System
time
060-06F Keyboard
Controller
070-07F
System CMOS/Real time Clock
080-09F DMA
Controller
0A0-0A1 Interrupt
Controller
0C0-0DF DMA
Controller
0F0-0FF
Numeric data processor
1F0-1F7 Primary
IDE
Channel
2F8-2FF
Serial Port 2 (COM2)
378-37F
Parallel Printer Port 1 (LPT1)
3B0-3BB Intel®
Graphics
Controller
3C0-3DF Intel®
Graphics
Controller
3F6-3F6 Primary
IDE
Channel
3F7-3F7
Standard floppy disk controller
3F8-3FF
Serial Port 1 (COM1)
Table D-1: IO Address Map
D.2 1st MB Memory Address Map
Memory address
Description
00000-9FFFF System
memory
A0000-BFFFF VGA
buffer
F0000-FFFFF System
BIOS
1000000-
Extend BIOS
Table D-2: 1
st
MB Memory Address Map