IEI Integration PCIE-Q350 v1.00 - Manual (Page 54)

PCIE-Q350 PICMG 1.3 CPU Card
Page 32
insertion, stripping, and packet filtering for up to 4096 VLAN tags
Boot ROM Preboot eXecution Environment (PXE) Flash interface support
SDG 3.0,WfM 3.0 and PC2001 compliant
Wake on LAN support
2.7 PCI Bus Components
2.7.1 PCI Bus Overview
The PCI bus is connected to the components listed below:
ITE IT8211 ATA controller chipset
IT8209R PCI arbiter
PCI edge connector
The PCI bus complies with PCI Local Bus Specification, Revision 2.3 and supports 33MHz
PCI operations.
2.7.2 ITE IT8209 PCI Arbiter
One of the Intel® ICH9DO Southbridge PCI lanes is connected to an ITE IT8209 PCI
arbiter. One set of SYSGNT# and SYSREQ# on the ITE IT8209 supports three PCI
Masters thereby enabling the PCIE-Q350 to support an additional two PCI Masters. The
ITE IT8209 PCI arbiter is shown in Figure 2-17 below.