Cirrus Logic AN379 - Manual (Page 27)

AN379
AN379REV2 27
Solving Equation 36 on page 18 for damping capacitance C
damp
yields Equation 71:
where
C
damp
= damping capacitor C12 and selected as 1 F using empirical evidence
Step 18) Clamp Circuit
The first criteria requires the clamp circuit to dissipate equal amounts of power being produced by the boost
stage. Solving Equation 37 on page 18 for clamp resistor R
CLAMP
yields Equation 72:
where
K
CLAMP(on)
= the clamp turn-on constant, which is equal to 0.878
The second criteria requires that the clamp duty cycle that triggers the second stage to turn on is sufficient to
dissipate as much power in the clamp circuit as the minimum load. The minimum dim level is defined to be 5%
for the CRD1680. Solving Equation 38 on page 19 for clamp resistor R
CLAMP
yields Equation 73:
Since minimum output power P
OUT(min)
is equal to 0.258W, the inequality P
Target
≥ 45.5

P
OUT(min)
is true.
The first criteria is used to select clamp resistor R
CLAMP
. The clamp resistance must have a minimum rating
of 2W. Solving Equation 39 on page 19 for the maximum clamp circuit resistance yields Equation 74:
Clamp resistor R7 is selected to be a 47  standard value with a 2W rating.
4.3 Final Design Steps
Step 19) Choose Power Components
The drain current through FET Q3 and Q1 is limited to approximately 1A and 2A, respectively. Since clamp
voltage V
CLAMP
is equal to 35V and establishes the maximum steady-state operating voltage, a 40V FET
capable of handling approximately 2A was defined for FET Q1, Q2, and Q3. Empirical results validated
choosing an IRLML0040TRPBF power FET, which meets the requirements.
The boost stage output diode D1 has a maximum peak current of approximately 2A, and a max reverse voltage
of approximately 37.5V. The buck stage output diode D2 has a maximum peak current approximately 1.5A. A
40V, 2A fast-recovery diode, such as PMEG4020EP, meets the requirements.
Step 20) Startup Circuit and Steady State Supply
The startup circuit design is not related to any specific power converter design and should be replicated as
shown in the CRD1680 schematic, which is provided in Figure 6 on page 28.
It is recommended to build a startup and steady state supply circuit that contains the following components:
capacitors C4, C5, C9, and C21, diodes D13 and D11, zener diodes D9 and D7, resistors R3, R4, R12 and
R13, transistors Q4 and Q5 and Schmitt-trigger inverter U2. The startup and supply circuit is optimized to work
with the CS1680 across a range of applications.
Step 21) External Overtemperature Protection
The CRD1680-7W does not use the external overtemperature protection.
C
damp
L
leak
C
rect

R
damp
-------------------------------------
2 H 1F 
1.0 
--------------------------------- 1.4 F = = = [Eq. 71]
R
CLAMP
V
BST full  
K
CLAMP on  
  
2
P
T et arg
----------------------------------------------------------------------
40V 0.878   
2
15.45W
---------------------------------------- 80  = =  [Eq. 72]
R
CLAMP
V
BST full  
K
CLAMP on  
  
2
45.5 P
OUT min  

----------------------------------------------------------------------
40V 0.878   
2
45.5 5.15 0.05    
---------------------------------------------------- 105.3  = =  [Eq. 73]
R
CLAMP
V
BST full  
K
CLAMP on  
  
2
10 P
OPP

----------------------------------------------------------------------
40V 0.878   
2
10 2W 
---------------------------------------- =  61.7  = [Eq. 74]