Cirrus Logic CS4391 - Manual (Page 17)

CS4391
DS335PP4 17
4. REGISTER DESCRIPTION
** All register access is R/W in I
2
C mode and write only in SPI mode **
4.1 MODE CONTROL 1 - ADDRESS 01H
4.1.1 Auto-Mute (Bit 7)
Function:
The Digital-to-Analog converter output will mute following the reception of 8192 consecutive audio
samples of static 0 or -1. A single sample of non-static data will release the mute. Detection and
muting is done independently for each channel. (However, Auto-Mute detection and muting can be-
come dependent on either channel if the Mute A = B function is enabled.) The common mode on the
output will be retained and the Mute Control pin for that channel will go active during the mute period.
The muting function is effected, similar to volume control changes, by the Soft and Zero Cross bits in
the Volume and Mixing Control register.
4.1.2 Digital Interface Formats (Bits 6:4)
Function:
PCM Mode - The required relationship between the Left/Right clock, serial clock and serial data is
defined by the Digital Interface Format and the options are detailed in Table 2 and Figures 7-24.
DSD Mode - The relationship between the oversampling ratio of the DSD audio data and the required
Master clock to DSD data rate is defined by the Digital interface Format pins. Note that the Functional
Mode registers must be set to DSD Mode.
See Table 1 (PCM Modes)
See Table 2 (DSD Mode)
4.1.3 De-Emphasis Control (Bits 3:2)
Function:
Implementation of the standard 15
µs/50 µs digital de-emphasis filter response, Figure 13, requires
reconfiguration of the digital filter to maintain the proper filter response for 32, 44.1 or 48 kHz sample
rates. NOTE: De-emphasis is available only in Single-Speed Mode.
See Table 3
4.1.4 Functional Mode (Bits 1:0)
Function:
Selects the required range of input sample rates or DSD Mode.
See Table 4
7 6 5 4 3 2 1 0
AMUTE DIF2 DIF1 DIF0 DEM1 DEM0 FM1 FM0