Cirrus Logic CS49DV8C User Manual

Page 21

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DS868PP2

Copyright 2008 Cirrus Logic, Inc.

21

CS49DV8C Data Sheet

32-bit Audio DSP Family

Figure 10. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK)

DAO_SCLK

DAO_LRCLK

DAOn_DATAn

t

daosstlr

t

daosclk

DAO_SCLK

DAO_LRCLK

t

daoslrts

t

daosdv

t

daosclk

Note: In these diagrams, Falling edge is the inactive edge of DAO_SCLK

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