Register description, 1 chip id - register 01h, Table 5. device revision – Cirrus Logic CS5345 User Manual

Page 32: 2 power control - address 02h, 1 freeze (bit 7), Table 6. freeze-able bits, 2 power-down mic (bit 3), 3 power-down adc (bit 2), 4 power-down device (bit 0), Table 5. device revision table 6. freeze-able bits

Advertising
Register description, 1 chip id - register 01h, Table 5. device revision | 2 power control - address 02h, 1 freeze (bit 7), Table 6. freeze-able bits, 2 power-down mic (bit 3), 3 power-down adc (bit 2), 4 power-down device (bit 0), Table 5. device revision table 6. freeze-able bits | Cirrus Logic CS5345 User Manual | Page 32 / 42 Register description, 1 chip id - register 01h, Table 5. device revision | 2 power control - address 02h, 1 freeze (bit 7), Table 6. freeze-able bits, 2 power-down mic (bit 3), 3 power-down adc (bit 2), 4 power-down device (bit 0), Table 5. device revision table 6. freeze-able bits | Cirrus Logic CS5345 User Manual | Page 32 / 42
Advertising
See also other documents in the category Cirrus Logic Hardware: