Cirrus Logic CS5364 - Manual (Page 22)

22 DS625F5
CS5364
4.5 Serial Audio Interface (SAI) Format
The SAI port consists of two timing pins (SCLK, LRCK/FS) and four audio data output pins (SDOUT1/TDM,
SDOUT2, SDOUT3/TDM and SDOUT4). The CS5364 output is serial data in I²S, Left-Justified (LJ), or Time
Division Multiplexed (TDM) digital audio interface formats. These formats are available to the user in both
Stand-Alone Mode and Control Port Mode.
4.5.1 I²S and LJ Format
The I²S and LJ formats are both two-channel protocols. During one LRCK period, two channels of data are
transmitted, odd channels first, then even. The MSB is always clocked out first.
In Slave Mode, the number of SCLK cycles per channel is fixed as described under “Serial Audio Interface
- I²S/LJ Timing” on page 15 . In Slave Mode, if more than 32 SCLK cycles per channel are received from a
master controller, the CS5364 will fill the longer frame with trailing zeros. If fewer than 24 SCLK cycles per
channel are received from a master, the CS5364 will truncate the serial data output to the number of SCLK
cycles received. For a complete overview of serial audio interface formats, please refer to Cirrus Logic Ap-
plication Note AN282.
Figure 10. I²S Format
Figure 11. LJ Format
Odd Channels 1,3, ...
Even Channels 2,4, ... LRCK
receiver latches data on rising edges of SCLK
SDOUT
SCLK
MSB
...
LSB MSB
...
LSB MSB
Odd Channels 1,3, ...
Even Channels 2,4, ... LRCK
receiver latches data on rising edges of SCLK
MSB
...
LSB MSB MSB
...
LSB SDOUT
SCLK