MSI G41M-P33 Combo - Manual (Page 24)

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intel eiSt
the enhanced intel SpeedStep technology allows you to set the performance
level of the microprocessor whether the computer is running on battery or aC
power. this field will appear after you installed the CPu which support speedstep
technology.
Ce Support
to enable this item to read the CPu power consumption while idle. not all proces-
sors support enhanced Halt state (Ce).
adjust CPu Base Frequency (mHz)
this item allows you to set the CPu Base clock (in mHz). you may overclock
the CPu by adjusting this value. Please note the overclocking behavior is not
guaranteed.
adjusted CPu Frequency (mHz)
it shows the adjusted CPu frequency. Read-only.
advance dRam Configuration
Press <enter> to enter the submenu.
dRam timing mode
Selects whether dRam timing is controlled by the SPd (Serial Presence de-
tect) eePRom on the dRam module. Setting to [auto By SPd] enables dRam
timings and the following related items to be determined by BioS based on the
configurations on the SPd. Selecting [manual] allows users to configure the
dRam timings and the following related items manually.
CaS Latency (CL)
When the dRam timing mode sets to [manual], the field is adjustable. this
controls the CaS latency, which determines the timing delay (in clock cycles)
before SdRam starts a read command after receiving it.
tRCd
When the dRam timing mode sets to [manual], the field is adjustable. When
dRam is refreshed, both rows and columns are addressed separately. this
setup item allows you to determine the timing of the transition from RaS (row
address strobe) to CaS (column address strobe). the less the clock cycles, the
faster the dRam performance.
tRP
When the dRam timing mode sets to [manual], the field is adjustable. this
item controls the number of cycles for Row address Strobe (RaS) to be al-
lowed to precharge. if insufficient time is allowed for the RaS to accumulate its
charge before dRam refresh, refreshing may be incomplete and dRam may
fail to retain data. this item applies only when synchronous dRam is installed
in the system.
tRaS
When the dRam timing mode sets to [manual], the field is adjustable. this set-
ting determines the time RaS takes to read from and write to a memory cell.