5 ipmi, Ipmi - 12, At8902m hardware description – Kontron AT8902M User Manual

Page 45

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AT8902M

Hardware Description

Page 3 - 12

AT8902M User Guide

AM4310

The 10GbE Uplink AMC AM4310 connects two XAUI interfaces to the fabric switch. De-
pending on the fabric mezzanine option of the AT8902M, either both AMC slots provide
two XAUI interfaces, or only B2, or none (see chapter 3.2.1).
If only one AM4310 will be used, the preferred slot is B2. This allows additional use of a
PrAMC or MCG AMC in B1.

For more information on the AM4310, refer to chapter 3.3.

3.1.5

IPMI

The Hub Board supports an intelligent hardware management system, based on the Intelligent
Platform Management Interface (IPMI) Specification 1.5. The hardware management system
provides the ability to manage the power, cooling and interconnect needs of intelligent devices,
to monitor events and to log events to a central repository.

The main building blocks of the IPMI architecture of the AT8902M are:

• IPMC Intelligent Platform Management Controller

• FUM Firmware Update Manager

• CPLD Complex Programmable Logical Device

For further details please refer PICMG 3.0 standard Rev. 2.0.

IPMC

The IPM controller is a 16-bit microcontroller for IPMI applications and it is compliant to IPMI
version 1.5 specification. The microcontroller has large on chip memory of 512 Kbyte Flash and
40 Kbyte SRAM. The microcontroller provides six I2C interfaces to have access to the dedicat-
ed ShMCs, the AMCs, the fabric mezzanine module, the RTM and the on board peripheral de-
vices such as SEEPROM and temperature sensor. The microcontroller also provides three
serial interfaces that are connected to the CPLD.

An LPC interface using the KCS protocol for communication between IPMC and PPC is imple-
mented. IPMC operation is supervised by the FUM.

FUM

The Firmware Update Manager (FUM) is a microcontroller with embedded 16 Kbyte data flash
ROM and 1 Kbyte RAM.

The FUM is responsible for field upgrades, rollbacks and watchdog functions of the IPM con-
troller. Four SPI compatible memory devices are connected to the FUM which build up two IPMI
firmware banks with 512 Kbyte each. One bank contains a copy of the current IPMC code. The
other bank can be written without affecting IPMC operation. Once the bank is updated, the FUM
writes its content into the IPMC. IPMC control signals are all buffered in the CPLD so that board
operation is not affected during update. In the case of a fault during the update process, the
FUM can configure the IPMC with the old firmware that is kept in the other bank. The FUM is
also the watchdog timer for the IPMC. There are several control signals to supervise the IPM
controller.

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