Campbell Scientific SDM-SW8A 8-Channel Switch Closure Input Module - Manual (Page 15)

SDM-SW8A Switch Closure Input Module
7.3 Watchdog Reset
Any microprocessor may occasionally fail due to input transients or
intermittent component failure (e.g., a bombed condition). The SW8A has a
"watchdog" counter which resets the processor under such conditions. When
functioning normally, the processor resets the watchdog counter. To transfer
data between the datalogger and the SW8A, the datalogger drives the clock
line, Control Port 2, high and low (refer to Theory of Operation, Section 9).
The watchdog counts clock line transitions, and if the count exceeds 64, the
watchdog resets the SW8A processor. Requesting State produces 16 clock
transitions. Duty Cycle and Count each produce 24 + 16 clock transitions per
channel.
The length of time that the SW8A stays bombed before a watchdog reset
occurs is a function of the datalogger scan rate and the amount of information
requested from the Module. For example, if the datalogger scan rate is 10
minutes, and 2 channels of counts are requested, the SW8A may stay bombed
for 20 minutes. To avoid this undesirable time delay before resetting, a
trapping routine may be programmed into the datalogger to detect a bombed
condition and immediately force a watchdog reset.
When the module is bombed, NaN is stored in variables for CRBasic
dataloggers, and -99999 is stored in input locations for Edlog dataloggers.
When NaN or -99999 is detected, the trapping routine immediately forces a
watchdog reset by addressing the Module and requesting sufficient information
to cause a minimum of 65 clock line transitions. Advantages to using a
trapping routine are:
• The bombed processor is detected before erroneous values (NaN or
-99999) are included in subsequent processing.
• The processor may be reset sooner.
• The time of processor failure may be logged by the datalogger.
• Number of failures may be logged.
A CRBasic example of this trapping routine is shown below.
A trapping routine using Edlog is included in the example program in
Appendix A.
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