ADLINK CoreExpress-ECO2 - Manual (Page 28)

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 24
5.2 I/O Address Map
The system chip set implements a number of registers in I/O address space. These registers occupy
the following map in the I/O space.
Address Range (Hex) Description
20h-3Ch 8259 Master
40h-53h 8254
61h-67h NMI Controller
70h-77h NMI and RTC
84h-86h Internal
88h Internal
8Ch-8Eh Internal
A0h-ACh 8259 Slave
B0h 8259 8259 Slave
B2h-B3h Power Management
B4h-BCh 8259 Slave
3B0h-3BBh VGA
3C0h-3DFh VGA
CF8h, CFCh Internal
CF9h Reset Generator