ADLINK MCS-2040 - Manual (Page 34)

34
MCS-2040
Hyper-threading
Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology)
and Disabled for other OS (OS not optimized for Hyper-Threading Technology).
Options
Enabled
For Windows XP and Linux (OS optimized for Hyper-Threading
Technology).
Disabled
For other OS (OS not optimized for Hyper-Threading
Technology).
Active Processor Core
Number of cores to enable in each processor package.
Set this value to All, 1, 2, 3.
Limit CPUID Maximum
The Limit CPUID Maximum allows you to circumvent problems with older operating
systems that do not support Hyper-Threading Technology. When enabled, the
processor will limit the maximum CPUID input value to 03h when queried, even if
the processor supports a higher CPUID input value. When disabled, the processor
will return the actual maximum CPUID input value of the processor when queried.
Execute Disable Bit
Execute Disable Bit (EDB) is an Intel hardware-based security feature that can help
reduce system exposure to viruses and malicious code. EDB allows the processor
to classify areas in memory where application code can or cannot execute. Set this
value to Enabled/Disabled.
Intel Virtualization Technology
When enabled, a VMM can utilize the additional hardware capability provided by
Vanderpool Technology. Set this value to Enabled/Disabled.
Hardware Prefetcher
When Enabled, the processor's hardware prefetcher will be enabled and allowed to
automatically prefetch data and code for the processor. When Disabled, the
processor's hardware prefetcher will be disabled.
Adjacent Cache Line Prefetch
The processor has a hardware adjacent cache line prefetch mechanism that
automatically fetches an extra 64-byte cache line whenever the processor requests
for a 64-byte cache line. This reduces cache latency by making the next cache line
immediately available if the processor requires it as well. When enabled, the
processor will retrieve the currently requested cache line, as well as the subsequent
cache line. When disabled, the processor will only retrieve the currently requested
cache line.