Programming the flash memory of an fpga on windows – Altera RTE for OpenCL User Manual
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Programming the Flash Memory of an FPGA on Windows
By default, you configure an FPGA using the hardware image stored in the flash memory of the device.
When there is no power, the FPGA retains the hardware configuration file in the flash memory. When
you power up the system, it configures the FPGA circuitry based on this hardware image in the flash
memory. Therefore, it is imperative that an OpenCL-compatible hardware configuration file is loaded
into the flash memory of your FPGA.
Preloading an OpenCL image into the flash memory is necessary for the proper functioning of many
Custom Platforms. For example, most PCI Express
®
(PCIe
®
)-based boards require a valid OpenCL image
in flash memory so that hardware on the board can use the image to configure the FPGA device when the
host system powers up for the first time. If the FPGA is not configured with a valid OpenCL image, the
system will fail to enumerate the PCIe endpoint, or the driver will not function.
Before running any designs, ensure that the flash memory of your board has an valid OpenCL image that
is compatible with the current OpenCL software version. Consult your board vendor's documentation for
board-specific requirements.
Caution:
When you load the hardware configuration file into the flash memory of the FPGA, maintain
system power for the entire loading process, which might take a few minutes. Also, do not
launch any host code that calls OpenCL kernels or might otherwise communicate with the
FPGA board.
To load your hardware configuration file into the flash memory of your FPGA board, perform the
following tasks:
1. Install any drivers or utilities that your Custom Platform requires.
For example, some Custom Platforms require you to install the USB-Blaster
™
driver to load your
hardware configuration file into the flash memory. For installation instructions, refer to the
®
USB-
Blaster II Download Cable User Guide.
2. Ensure that you set the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the
subfolder in your Custom Platform that contains the
board_env.xml
file.
3. Download an example design for your Custom Platform.
Remember: You can download example designs from the OpenCL Design Examples page, and extract
the example to a location to which you have write access.
4. To load the hardware configuration file into the flash memory, invoke the
aocl flash
<device_name> <example_design_filename>.aocx
command, where <device_name>
refers to the acl number (e.g. acl0 to acl15) that corresponds to your FPGA device, and
<example_design_filename>.aocx
is the precompiled hardware configuration file you can find in the
example design package.
5. Power down your device or computer and then power it up again.
Power cycling ensures that the FPGA configuration device retrieves the hardware configuration file
from the flash memory and configures it into the FPGA.
Warning:
Some Custom Platforms require you to power cycle the entire host system after program‐
ming the flash memory. For example, PCIe-based Custom Platforms might require a host
system reboot to reenumerate the PCIe endpoint. Altera recommends that you power cycle
the complete host system after programming the flash memory.
Related Information
•
OCL005-15.0.0
2015.05.04
Programming the Flash Memory of an FPGA on Windows
2-7
Getting Started with the Altera RTE for OpenCL for 64-Bit Windows
Altera Corporation