Altera Cyclone II PowerPlay Early Power Estimator - Manual (Page 19)

Altera Corporation 3–3
May 2006 PowerPlay Early Power Estimator User Guide For Cyclone II FPGAs
Using the Cyclone II PowerPlay Early Power Estimator
Figure 3–1 shows the Main section of the Cyclone II PowerPlay Early
Power Estimator spreadsheet.
Figure 3–1. Cyclone II PowerPlay Early Power Estimator Spreadsheet Main
Section
Logic
A design is a combination of several design modules operating at
different frequencies and toggle rates. Each design module can have a
different amount of logic. For the most accurate power estimation,
partition the design into different design modules. You can partition your
design by grouping modules by clock frequency, location, hierarchy, or
entities.
Each row in the Logic section represents a separate design module. You
must enter the following parameters for each design module
■ Clock frequency (f
MAX
) in MHz
■ Number of look-up tables (LUTs)
■ Number of registers
■ Toggle percentage