Zilog EZ80F91 - Manual (Page 74)

eZ80F91 Development Kit
User Manual
UM014220-0508 Appendix A—General Array Logic Equations
69
//
//
module F92_em_pal(
nDIS_EM,
nEM_EN,
A0,
A1,
A2,
A3,
A4,
A5,
A6,
A7,
nRD,
nCS,
nWR,
nMREQ,
nIORQ,
nEM_RD,
nEM_WR,
nAN_WR,
nCT_WR,
nDIS_ETH
);
input nDIS_EM /* synthesis loc="P3"*/,
nEM_EN /* synthesis loc="P4"*/,
A0 /* synthesis loc="P5"*/,
A1 /* synthesis loc="P6"*/,