Stop mode operation – Zilog Z8PE002 User Manual

Page 23

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Z8PE002

ZiLOG

Z8Plus OTP Microcontroller

DS008700-Z8X0799

P R E L I M I N A R Y

23

STOP MODE OPERATION

The

STOP

mode provides the lowest possible device stand-

by current. This instruction turns off the on-chip oscillator
and internal system clock.

To enter the

STOP

mode, the Z8Plus only requires a

STOP

instruction. It is not necessary to execute a

NOP

instruction

immediately before the

STOP

instruction.

The

STOP

mode is exited by any one of the following resets:

POR

or a Stop-Mode Recovery source. At reset generation,

the processor always restarts the application program at ad-
dress

0020H

, and the

STOP

mode flag is set. Reading the

STOP

mode flag does not clear it. The user must clear the

STOP

mode flag with software.

Note: Failure to clear the

STOP

mode flag can result in unde-

fined behavior.

The Z8Plus provides a dedicated Stop-Mode Recovery
(

SMR

) circuit. In this case, a low-level applied to input pin

PB0

(I/O Port B, bit 0) triggers an

SMR

. To use this mode,

pin

PB0

must be configured as an input and the special func-

tion selected before the

STOP

mode is entered. The Low

level on

PB0

must be held for a minimum pulse width

T

WSM

. Program execution starts at address

20h

, after the

POR

delay.

Notes: 1. The

PB0

input, when used for Stop-Mode Recovery,

does not initialize the control registers.

The

STOP

mode current (

I

CC2

) is minimized when:

•

V

CC

is at the low end of the device’s operating range

•

Output current sourcing is minimized

•

All inputs (digital and analog) are at the Low or High
rail voltages

2. For detailed information about flag settings, see the

Z8Plus User’s Manual

.

6F

STOP

;enter STOP mode

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