BECKHOFF ET1100 - Manual (Page 6)

CONTENTS
III-VI Slave Controller – ET1100 Hardware Description
CONTENTS
1 Overview 1
1.1 Frame processing order 2
1.2 Scope of this document 3
1.3 Revision/Build History 3
2 Features and Registers 4
2.1 Features 4
2.2 Registers 7
3 Pin Description 10
3.1 Overview 10
3.1.1 Pin Overview 10
3.1.2 Signal Overview 12
3.1.3 PDI Signal Overview 13
3.2 Configuration Pins 14
3.2.1 Port Mode 14
3.2.2 Port Configuration 14
3.2.3 CPU_CLK MODE 17
3.2.4 TX Shift 17
3.2.5 CLK25OUT2 Enable 17
3.2.6 Transparent Mode Enable 18
3.2.7 Digital Control/Status Move 19
3.2.8 PHY Address Offset 19
3.2.9 Link Polarity 19
3.2.10 SII EEPROM Size 20
3.2.11 Reserved 20
3.3 General ET1100 Pins 21
3.4 SII EEPROM Interface Pins 21
3.5 MII Management Pins 22
3.6 Distributed Clocks SYNC/LATCH Pins 22
3.7 LED Signals 23
3.8 Physical Ports and PDI Pins 24
3.8.1 Physical Port Signals 25
3.8.2 MII Interface 25
3.8.3 EBUS Interface 26
3.8.4 PDI Pins 26
3.8.5 Physical Port 0 27
3.8.6 Physical Port 1 28
3.8.7 Physical Port 2 / PDI byte 4 29
3.8.8 Physical Port 3 / PDI Bytes 2/3 30
3.8.9 PDI Bytes 0/1 31