Fluke Biomedical 960SF-220 - Manual (Page 13)

Theory of Operation
High Voltage Shut Down
2
2-5
2.13 High Voltage Shut Down
The microprocessor can generate, under overrange or jam conditions, a command to shut the high
voltage down. When the SHUT DOWN signal goes high, Q3 turns on, Q5 turns on and Z4 pin 2 will be
forced into about 4.5 V potential.
This will cause Z4 pin 6 to become positive, Q7 to turn off and high voltage to turn off. Model 960SF-231
provides negative high voltage and does not utilize transistor Q3, a jumper is provided from the base to
the collector of the Q3 position on the circuit board.
2.14 Anti-Jam Printed Circuit Board
The anti-jam condition is detected when a pulse pile up condition exists. Discriminator output is fed into a
comparator after integration.
Integration is determined by R7*C2 with a one millisecond time constant. Z2 is the comparator and
compares the integrated voltage to the threshold set by R6. When the duty cycle exceeds a preset value,
the output of Z2 pin 1 will go high. This will trigger Z1 to go into a latch up condition that will cause Z1 pin
4 to stay high. This condition will turn Q2 and Q3 on which will cause the following to occur:
1. The jam bit will go high to indicate a "jam" condition.
2. Fuse F1 will blow causing the input of F1 permanently to stay low, which keeps the jam bit high
(active).
There is a start-up delay of ½ second to allow the high voltage to stabilize upon power up of the monitor.
The associated controller module also has access to this to allow the controller to reset the anti-jam
circuit. This delay is caused by the time constant of R13*C4. When the scaler is used with a scintillation
detector, jumper W1 is connected between pins B and C. If a GM detector is in use, W1 is jumpered
between pins A and B on the module.