Foxconn 915P7AD-8EKRS User Manual
Page 59
Chapter 3 BIOS Description
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Advanced Chipset Features
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DRAM Timing Selectable (Default: By SPD)
This item determines DRAM clock/ timing using SPD or manual configuration.
The available setting values are: By SPD and Manual.
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CAS Latency Time (Default: depend on memory)
This item determines CAS Latency. The available setting values are: 3, 2.5, 2
and Auto.
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DRAM RAS# to CAS# Delay (Default: depend on memory)
This item allows you to select a delay time between the CAS and RAS strobe
signals. The available setting values are: 5, 4, 3, 2, and Auto.
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DRAM RAS# Precharge (Default: depend on memory)
This item allows you to select the DRAM RAS# precharge time. The available
setting values are: 5, 4, 3, 2, and Auto.
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Precharge delay(tRAS) (Default: depend on memory)
This item allows you to set the precharge delay time. The available setting
values are: Auto, 4 - 15.
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SLP_S4# Assertion Width (Default: 4 to 5 Sec.)
This option indicates the assertion width of the SLP_S4# signal to guarantee
that the DRAMs have been safely power-cycled. The available setting values
are: 1 to 2 sec., 2 to 3 sec., 3 to 4 sec., 4 to 5 sec. .
Advanced Chipset Features Menu
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