IBASE MB967 - Manual (Page 50)

BIOS SETUP
50 MB967 User’s Manual
Wake on LAN
Enable or disable integrated LAN to wake the system. (The Wake On
LAN cannot be disabled if ME is on at Sx state.)
SLP_S4 Assertion Width
Select a minimum assertion width of the SLP_S4# signal.
PCI Express Configuration
Main Advanced
Chipset
Boot Security Save & Exit
PCI Express Configuration
→ ←
Select Screen
↑↓ Select Item
Enter: Select
+- Change Field
F1: General Help
F2: Previous Values
F3: Optimized Default
F4: Save ESC: Exit
PCI Express Clock Gating [Enabled]
DMI Link ASPM Control [Enabled]
DMI Link Extended Synch Control [Disabled]
PCIe-USB Glitch W/A [Disabled]
Subtractive Decode [Disabled]
PCIE Port 1 is assign
► PCI Express Root Port 2
► PCI Express Root Port 3
► PCI Express Root Port 4
► PCI Express Root Port 5
► PCI Express Root Port 6
► PCI Express Root Port 7
► PCI Express Root Port 8
PCI Express Clock Gating
Enable or disable PCI Express Clock Gating for each root port.
DMI Link ASPM Control
The control of Active State Power Management on both NB side and SB
side of the DMI link.
PCIe-USB Glitch W/A
PCIe-USB Glitch W/A for bad USB device(s) connected behind
PCIE/PEG port.