IBASE IPPCXXB9-RE - Manual (Page 48)

40 IPPCxxB9-RE User Manual
PCH-IO Configuration
This section allows you to configure the North Bridge Chipset.
Aptio Setup Utility
Main Advanced Chipset Boot Security Save & Exit
Intel PCH RC Version 1.1.0.0
→ ← Select Screen
↑↓Select Item
Enter: Select
+- Change Field
F1:
General Help
F2: Previous Values
F3: Optimized Default
F4: Save ESC: Exit
Intel PCH SKU Name HM76
Intel PCH Rev ID O4/C1
► PCI Express Configuration
► USB Configuration
► PCH Azalia Configuration
PCH LAN Controller Enabled
Wake on LAN Enabled
High Precision Event Timer Configuration
High Precision Timer
Enabled
SLP_S4 Assertion Width 4-5 Seconds
PCH LAN Controller
Enable or disable onboard NIC.
Wake on LAN
Enable or disable integrated LAN to wake the system. (The Wake On LAN cannot be
disabled if ME is on at Sx state.)
SLP_S4 Assertion Width
Select a minimum assertion width of the SLP_S4# signal.