Yaesu VX-3R Сервис-мануал - Manual (Page 8)

8
Circuit Description
(2) Modulation
Voice signal input from either built-in microphone
MC1001 on MAIN-UNIT or external jack J1004 on the
MAIN-UNIT is pre-emphasized by C1056 and R1033, and
processed by microphone amplifier Q1010 (NJM3403AV),
IDC (instantaneous deviation control) circuit Q1010
(NJM3403AV) to prevent over-modulation, and active
low-pass filter Q1010 (NJM3403AV).
During CTCSS operation, the voice signal is mixed with
the TONE ENC subaudible tone signal from pin 43 of the
CPU and delivered to the VCO. During DTMF operation,
the DTMF tones from pin 55 of the CPU are input to the
IDC stage.
(3) 145 MHz Band Transmission
Modulating audio passes through deviation setting D/A
converter Q1017 (M62364FP) to VHF MOD of the VCO-
UNIT mounted on the MAIN-UNIT. This signal is applied
to varactor D4005 (HSC277TRF) in the tank circuit of VHF
VCO Q4004 (MT3S36FS), which oscillates at the desired
VHF transmitting frequency. The modulated VCO signal
is buffered by amplifier Q4006 (MT3S36FS) and Q1048
(2SC5374) and delivered through VHF T/R diode switch
D1038 to the MAIN-UNIT. The modulated low-level VHF
transmit signal from the VCO is passed through diode
switch D1040 (DAN222M) to amplifier Q3001 (2SC5374).
The modulated VHF transmit signal from the VCO is
amplified by Q3001 (2SC5374) and RF power amplifier
Q3003 (2SC5226) up to 0.3 or 3 W (depending on the pow-
er source). The RF output passes through TX diode switch
D1052 (RLS135). RF output is passed by T/R switch and
low-pass filter to suppress harmonics and spurious prod-
ucts before output to the antenna at the antenna terminal.
(4) 435 MHz Band Transmission
Modulating audio passes through deviation setting D/A
converter Q1017 (M62364FP) to UHF MOD of the VCO-
UNIT mounted on the MAIN-UNIT. This signal is applied
to varactor D4002 (HSC277TRF) in the tank circuit of UHF
VCO Q4002 (MT3S36FS), which oscillates at the desired
UHF transmitting frequency. The modulated VCO signal
is buffered by amplifier Q4006 (MT3S36FS) and Q1056
(2SC5374) and delivered through UHF T/R diode switch
D1039 (DAN222M) to the MAIN-UNIT. The modulated
low-level UHF transmit signal from the VCO is passed
through diode switch D1040 (DAN222M) to amplifier
Q3004 (RQA0003DNS). The modulated UHF transmit sig-
nal from the VCO is amplified by Q3001 (2SC5374) and
RF power amplifier Q3003 (2SC5226) up to 0.3 or 2 W
(depending on the power source). The RF output passes
through TX diode switch D1050 (RLS135). RF output is
passed by T/R switch and low-pass filter to suppress har-
monics and spurious products before output to the an-
tenna at the antenna terminal.
PLL Frequency Synthesizer
PLL IC Q1041 (MB15A01PFV1) on the MAIN-UNIT con-
sists of a data shift register, reference frequency divider,
phase comparator, charge pump, intermittent operation
circuit, and band selector switch. Serial PLL data from
the CPU is converted into parallel data by the shift regis-
ter in the PLL IC and is latched into the comparative fre-
quency divider and reference frequency divider to set a
frequency dividing ratio for each. An 11.7 MHz reference
signal produced by X1001 is input to REF pin 1 of the PLL
IC. The internal reference frequency divider divides the
11.7 MHz reference by 2,050 (or 1,640) to obtain a refer-
ence frequency of 5 kHz (or 6.25 kHz), which is applied
to the phase comparator. Meanwhile, a sample of the out-
put of VHF VCO Q4004 or UHF VCO Q4002 on the VCO-
UNIT, buffered by Q4006, is input to the PLL IC, where it
is frequency-divided by the internal comparative frequen-
cy divider to produce a comparative frequency also ap-
plied to the phase comparator. The phase comparator com-
pares the phase between the reference frequency and com-
parative frequency to output a pulse corresponding to the
phase difference between them. This pulse is input to the
charge pump, and the output from the charge pump pass-
es through a loop filter composed of R1280, R1281, C1185,
R1169 and either R1171, C1187, R1174 and C1190 for VHF,
or R1170, C1186, R1173 and C1189 for UHF, which con-
vert the pulse into a corresponding smoothed varactor
control voltage (VCV). The VCV is applied to varactor
D4004 and D4013 (both 1SV325) in the VHF VCO tank
circuit, or to varactor D4001 (HVC355B) in the UHF VCO
tank circuit, to eliminate phase difference between the ref-
erence frequency and comparative frequency, and so lock-
ing the VCO oscillation frequency to the reference crys-
tal. The VCO frequency is determined by the frequency-
dividing ratio sent from the CPU to the PLL IC. During
receiver power save operation, the PLL circuit operates
intermittently to reduce current consumption, for which
the intermittent operation control circuit reduces the lock-
up time.