Synthesizing the task with xst creating the task, Figure 6: system generator configuration, Figure 7: netlist properties – Sundance SMT6040 User Manual
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Sundance Multiprocessor Technology Limited
Form : QCF32
SMT6040
“Sundance Simulink Toolbox”
Date : 6 July 2006
Figure 6: System Generator configuration
2.2.6 Synthesizing the Task with XST Creating the task
The VHDL files produced by System Generator may be synthesized with XST to produce a
netlist.
Figure 7: netlist properties
The netlist generated must not have any I/O buffers, since the task will be used in a higher
level design. In most cases it shouldn’t implement any clock buffers since Diamond will
implement them for you. The configuration XST is shown in Figure 7.
Add I/O
buffers must
not be ticked; all the other options can be set to values you choose.
SMT6040 - “Sundance Simulink Toolbox”
Last Edited: 08/01/2010 15.42
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