Sundance SMT712 - Manual (Page 11)

User Manual SMT712 Page 11 of 89 Last Edited: 11/12/2012 10:36:00
4.2 Block Diagram – Standard SMT712 (PXIe)
Figure 2 - SMT712 Block Diagram – Standard SMT712 (PXIe)
This option implements a PCI Express Endpoint core (Xilinx) based on 4 lanes. It can
support up to 8 lanes or only one. The FPGA also has accesses to all PXI triggers and
synchronisation signals.
In case the user has in mind to recompile/change the firmware, the PCI Express Core
is free and provided by Xilinx. A free license locked on a PC MAC key has to be
requested.
The SMT712 (PXIe version) can only be plugged into a PXI Express or CompactPCI
Express Rack.
Note that not all resources are implemented in the standard FPGA firmware.