Eurotech Appliances VIPER / VIPER-LITE PXA255 - Manual (Page 106)

VIPER Technical Manual Appendix E – Acronyms and abbreviations
© 2007 Eurotech Ltd Issue E 106
Appendix E – Acronyms and abbreviations
Amp Amplifier
ATA Advanced Technology Attachment
BTUART Bluetooth Universal Asynchronous Receiver / Transmitter
CAN Control Area Network
CCCR Core Clock Configuration Register
CF Compact Flash
CFI Common FLASH Interface
CODEC Coder/Decoder
COM Communication Port
CPLD Complex Programmable Logic Device
CPU Central Processing Unit (PXA255)
CMOS Complementary Metal Oxide Semiconductor
CRT Cathode Ray Tube
DAC Digital to Analogue Converter
DMA Direct Memory Access
DUART Dual Universal Asynchronous Receiver / Transmitter
EEPROM Electrically Erasable and Programmable Read-Only Memory
EMC Electromagnetic Compatibility
EPROM Erasable and Programmable Read-Only Memory
EXT2 Linux's standard file system type
FFUART Full Function Universal Asynchronous Receiver / Transmitter
FIFO First-In First-Out
FLASH A non-volatile memory that is preserved even if the power is lost
FPIF1 Flat Panel Interface
GPIO General Purpose Input/Output
I2C (=IIC) Intra Integrated Circuit bus
ICE In-Circuit-Emulator
ICR
Interrupt Control and Reset register
IEEE Institute of Electrical and Electronics Engineers
IO Input/Output
ISA
Industry Standard Architecture, Bus in the IBM-PC
JTAG Joint Test Action Group of IEEE
LED Light Emitting Diode
LCD Liquid Crystal Display
LSB Least Significant Bit
LVDS Low Voltage Differential Signalling
NA Not Applicable
NC No Connect
NU Not Used
OS Operating System
PC/104 Offers full architecture, hardware and software compatibility with the
PC ISA bus, but in ultra-compact 96mm x 91mm (3.775" x 3.550")
stackable
modules
PCB Printed Circuit Board
PROM Programmable Read-Only Memory
PWM Pulse-Width Modulation